The present invention relates to semi-conductor devices and, more particularly, to use of germanium in gate conductors.
The fabrication of semi-conductor devices, such as field effect transistors, utilizes logic wafers containing isolation trench structures. A gate oxide dielectric layer is grown on the wafer. A film of gate conductor material is deposited over the dielectric layer. The gate conductor material might be, for example, silicon, tungsten, tungsten silicide, or another conductor. The gate conductor is patterned using standard photolithographic methods and then etched, stopping on the gate oxide layer.
Thin gate dielectrics are unstable and lead to reliability problems for logic and DRAM semi-conductor devices. The dielectric layer is destabilized by tunneling currents and the build-up of charge-trapping sites. The results of the destabilization are eventual degradation of the gate oxide material. This leads to direct shorts between the substrate and the gate conductor. The shorts cause device failure. It is desirable to devise a means for destabilizing the gate oxide dielectric layer such that device reliability can be improved for very thin gate oxide, for example, sub-30 nm gate oxides.
The present invention is directed to solving one or more of the problems discussed above in a novel and simple manner.
In accordance with the invention germanium is incorporated into a gate conductor material for a semi-conductor device.
In one aspect of the invention, a discrete film of germanium is utilized.
In another aspect of the invention, a composite film of germanium and conductor material is utilized.
Broadly, there is disclosed herein a semi-conductor device including a silicon substrate. A gate oxide dielectric layer is on the silicon substrate. A relatively thin layer of germanium is provided on the dielectric layer. A relatively thick layer of gate conductor material is provided on the layer of germanium.
It is a feature of the invention that the dielectric layer has a thickness susceptible to substantial tunneling degradation of the gate dielectric due to tunneling between the substrate and the gate conductor material.
It is another feature of the invention that the dielectric layer has a thickness less than about 60 angstroms.
It is a further feature of the invention that the germanium layer has a thickness in the range of about 5 to about 500 angstroms.
It is still another feature of the invention that the germanium layer has a thickness less than about 50 angstroms.
It is still a further feature of the invention that the dielectric layer comprises a layer of silicon dioxide.
It is yet another feature of the invention that the gate conductor material is selected from a group consisting of aluminum, silicon, tungsten, and tungsten silicide.
There is disclosed in accordance with another aspect of the invention a field effect transistor including a silicon substrate. A gate oxide dielectric layer is provided on the silicon substrate. A relatively thin layer of germanium silicide is provided on the dielectric layer. A relatively thick layer of gate conductor material is provided on the layer of germanium silicide.
It is a feature of the invention that the germanium silicide layer is in the range of about 50% to about 100% germanium.
It is still another feature of the invention that the germanium silicide is in the range of about 90% to about 100% germanium.
It is disclosed in accordance with yet another aspect of the invention the process of manufacturing a field effect transistor comprising the steps of providing a silicon substrate; forming a gate oxide dielectric layer on the silicon substrate; depositing a relatively thin layer of germanium or germanium silicide on the dielectric layer; and depositing a relatively thick layer of gate conductor material on the germanium or germanium silicide.
Further features and advantages of the invention will be readily apparent from the specification and from the drawing.